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Table 15. WLBGA Signal Descriptions (Cont.)
WLBGA Ball#
M6
B3
D3
K3
J2
B8
B7
B9
C2
C1
B2
D1
F2
H11
K12
E2
D2
F1
E1
N6
N4
L4
M4
N3
N1
L2
J1
Document Number: 002-14949 Rev. *G
PRELIMINARY
Signal Name
BT_AGPIO
WL_REG_ON
BT_REG_ON
BT_DEV_WAKE
BT_HOST_WAKE
HSIC_STROBE/STROBE
HSIC_DATA/DATA
RREFHSIC
Integrated Voltage Regulators
SR_VDDBATA5V
SR_VDDBATP5V
SR_VLX
LDO_VDD1P5
LDO_VDDBAT5V
WRF_XTAL_VDD1P5/
WRF_XTAL_BUCK_VDD1P5
WRF_XTAL_VDD1P2/
WRF_XTAL_OUT_VDD1P2
VOUT_LNLDO
VOUT_CLDO
VOUT_BTLDO2P5
VOUT_3P3
BT_PAVDD/BT_PAVDD2P5
BT_LNAVDD/BT_LNAVDD1P2
BT_IFVDD/BT_IFVDD1P2
BT_PLLVDD/BT_PLLVDD1P2
BT_VCOVDD/BT_VCOVDD1P2
LNF_VDD1P2
LNF_VDD1P2
LNF_VDD1P2
Type
Bluetooth GPIO
I/O
BT analog GPIO pin.
Miscellaneous
I
Used by PMU to power up or power down the internal CYW43353
regulators used by the WLAN section. Also, when deasserted, this
pin holds the WLAN section in reset. This pin has an internal 200 kΩ
pull-down resistor that is enabled by default. It can be disabled
through programming.
I
Used by PMU to power up or power down the internal CYW43353
regulators used by the Bluetooth/FM section. Also, when
deasserted, this pin holds the Bluetooth/FM section in reset. This
pin has an internal 200 kΩ pull-down resistor that is enabled by
default. It can be disabled through programming.
I/O
Bluetooth DEV_WAKE.
I/O
Bluetooth HOST_WAKE.
I/O
Unsupported. This pin can be connected to ground or left
unconnected (no-connect).
I/O
Unsupported. This pin can be connected to ground or left
unconnected (no-connect).
I
Unsupported. Leave this pin unconnected (no-connect).
I
Quiet VBAT.
I
Power VBAT.
O
Cbuck switching regulator output. Refer to
inductor and capacitor required on this output.
I
LNLDO input.
I
LDO VBAT.
I
XTAL LDO input (1.35V).
O
XTAL LDO output (1.2V).
O
Output of LNLDO.
O
Output of core LDO.
O
Output of BT LDO.
O
LDO 3.3V output.
Bluetooth Supplies
PWR
Bluetooth PA power supply.
PWR
Bluetooth LNA power supply.
PWR
Bluetooth IF block power supply.
PWR
Bluetooth RF PLL power supply.
PWR
Bluetooth RF power supply.
Supplies
PWR
Connect to VOUT_LNLDO Output (pin E2).
PWR
Connect to VOUT_LNLDO Output (pin E2).
PWR
Connect to VOUT_LNLDO Output (pin E2).
CYW43353
Description
Table 37
for details of the
Page 59 of 113
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