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BT_HOST_WAKE
BT_DEV_WAKE
UART
PCM
2
I
S
Other GPIOs
WL_REG_ON
BT_REG_ON
PMU
VBAT
32 kHz External LPO
Document Number: 002-14949 Rev. *G
PRELIMINARY
Figure 1. CYW43353 Block Diagram
RAM
ROM
UART
I2S
ARMCM3
PCM
WLAN
Master
Registers
Slave
DMA
JTAG
RX/TX
Master
BLE
LCU
GPIO
Timers
APU
WD
BlueRF
Pause
Modem
Bluetooth RF
BT
PA
Bluetooth
SECI UART
and GCI-GPIOs
GCI
TCM
WLAN RAM
RAM768KB
Sharing
ROM640KB
ARMCR4
BT Access
WLAN
AXI2AHB
AHB2AXI
Chip
Common
OTP
DOT11MAC (D11)
GCI Coex I/F
Shared LNA Control
1 x 1 802.11ac PHY
and Other Coex I/Fs
2.4 GHz/5 GHz 802.11ac
Dual-Band Radio
WLAN
FEM or
CLB
2.4 GHz
SP3T
Diplexer
CYW43353
WL_HOST_WAKE
WL_DEV_WAKE
JTAG
Other GPIOs
SDIOD
SDIO 3.0
AXI2APB
RF Switch Controls
XTAL
FEM or
5 GHz
SPDT
Page 7 of 113
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