Power-Off Shutdown; Power-Up/Power-Down/Reset Circuits - Infineon Cypress CYW43353 Manual

During each clock cycle, the PMU sequencer performs the following actions:
Computes the required resource set based on requests and the resource dependency table.
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Decrements all timers whose values are non zero. If a timer reaches 0, the PMU clears the ResourcePending bit for the resource
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and inverts the ResourceState bit.
Compares the request with the current resource status and determines which resources must be enabled or disabled.
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Initiates a disable sequence for each resource that is enabled, no longer being requested, and has no powered up dependents.
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Initiates an enable sequence for each resource that is disabled, is being requested, and has all of its dependencies enabled.
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2.5 Power-Off Shutdown

The CYW43353 provides a low-power shutdown feature that allows the device to be turned off while the host, and any other devices
in the system, remain operational. When the CYW43353 is not needed in the system, VDDIO_RF and VDDC are shut down while
VDDIO remains powered. This allows the CYW43353 to be effectively off while keeping the I/O pins powered so that they do not
draw extra current from any other devices connected to the I/O.
During a low-power shut-down state, the provided VDDIO remains applied to the CYW43353, all outputs are tristated, and most
input signals are disabled. Input voltages must remain within the limits defined for normal operation. This is done to prevent current
paths or create loading on any digital signals in the system, and enables the CYW43353 to be fully integrated in an embedded
device and take full advantage of the lowest power-savings modes.
When the CYW43353 is powered on from this state, it is the same as a normal power-up, and the device does not retain any infor-
mation about its state from before it was powered down.

2.6 Power-Up/Power-Down/Reset Circuits

The CYW43353 has two signals (see
blocks, allowing the host to control power consumption. For timing diagrams of these signals and the required power-up sequences,
see Section 19.: "Power-Up Sequence and
Table 1. Power-Up/Power-Down/Reset Control Signals
Signal
WL_REG_ON This signal is used by the PMU (with BT_REG_ON) to power up the WLAN section. It is also OR-gated with the BT_REG_ON
input to control the internal CYW43353 regulators. When this pin is high, the regulators are enabled and the WLAN section
is out of reset. When this pin is low, the WLAN section is in reset. If BT_REG_ON and WL_REG_ON are both low, the
regulators are disabled. This pin has an internal 200 k pull-down resistor that is enabled by default. It can be disabled
through programming.
BT_REG_ON This signal is used by the PMU (with WL_REG_ON) to decide whether or not to power down the internal CYW43353
regulators. If BT_REG_ON and WL_REG_ON are low, the regulators will be disabled. This pin has an internal 200 k pull-
down resistor that is enabled by default. It can be disabled through programming.
Document Number: 002-14949 Rev. *G
PRELIMINARY
Table 1) that enable or disable the Bluetooth and WLAN circuits and the internal regulator
Timing".
Description
CYW43353
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