Document History Page - Infineon Cypress CYW43353 Manual

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Document Title: CYW43353 Single-Chip 5G MAC/Baseband/Radio with Integrated Bluetooth 4.1 for Automotive and In-
dustrial Applications
Document Number: 002-14949
Revision
ECN
**
*A
Document Number: 002-14949 Rev. *G
PRELIMINARY
Submission Date
-
07/02/2013
-
04/02/2014
Description of Change
43353-DS100-R
Initial release
43353-DS101-R
Updated:
The cover page and the general features .
By deleting the HSIC interface throughout, leaving pin and signal names
unchanged.
By changing the VBAT maximum voltage to 4.8V throughout.
"External Frequency Reference".
Table 2: "Crystal Oscillator and External Clock — Requirements and
Performance" .
"Frequency Selection".
Figure 10: "Startup Signaling Sequence".
Figure 22: "UART Timing".
"One-Time Programmable Memory".
Table 20: "FCFBGA, WLBGA, and WLCSP Signal Descriptions," on page 117
by changing BT_VDDO to BT_VDDIO and adding a note to the GPIO pin
description.
Table 31: "I/O States".
Table 34: "ESD Specifications".
Table 35: "Recommended Operating Conditions and DC Characteristics," by
changing C
to C
.
IN
OUT
Table 36: "Bluetooth Receiver RF Specifications" by deleting what was footnote
e, altering footnote b, and adding footnote b to one additional place.
Table 37: "Bluetooth Transmitter RF Specifications"
"Introduction".
RSSI accuracy in Table 42: "WLAN 2.4 GHz Receiver Performance
Specifications" and Table 44: "WLAN 5 GHz Receiver Performance
Specifications".
Table 43: "WLAN 2.4 GHz Transmitter Performance Specifications" and the
note preceding it.
Table 45: "WLAN 5 GHz Transmitter Performance Specifications" and the note
preceding it.
Section 18: "Internal Regulator Electrical Specifications"
"WLAN Current Consumption" on page 175.
Figure 65: "SDIO Bus Output Timing (SDR Modes up to 100 MHz)".
Figure 66: "SDIO Bus Output Timing (SDR Modes 100 MHz to 208 MHz)".
CYW43353
Page 111 of 113

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