2
7.3 I
S Interface
The CYW43353 supports two independent I
2
2
I
S clock: I
S SCK
❐
2
2
I
S Word Select: I
S WS
❐
2
2
I
S Data Out: I
S SDO
❐
2
2
I
S Data In: I
S SDI
❐
2
2
I
S SCK and I
S WS become outputs in master mode and inputs in slave mode, while I
channel word length is 16 bits and the data is justified so that the MSB of the left-channel data is aligned with the MSB of the I
2
per the I
S specification. The MSB of each data word is transmitted one bit clock cycle after the I
the falling edge of bit clock. Left-channel data is transmitted when I
is high. Data bits sent by the CYW43353 are synchronized with the falling edge of I2S_SCK and should be sampled by the receiver
on the rising edge of I2S_SSCK.
The clock rate in master mode is either of the following:
48 kHz x 32 bits per frame = 1.536 MHz
48 kHz x 50 bits per frame = 2.400 MHz
The master clock is generated from the input reference clock using a N/M clock divider.
In the slave mode, any clock rate is supported to a maximum of 3.072 MHz.
2
7.3.1 I
S Timing
Note: Timing values specified in
2
Table 11. Timing for I
S Transmitters and Receivers
Clock Period T
HIGH t
HC
LOWt
LC
HIGH t
HC
LOW t
LC
Rise time t
RC
Delay t
dtr
Hold time t
htr
Setup time t
sr
Hold time t
hr
Document Number: 002-14949 Rev. *G
PRELIMINARY
2
S digital audio ports. The I
Table 11
are relative to high and low threshold levels.
Transmitter
Lower LImit
Upper Limit
Min.
Max.
Min.
T
–
–
tr
Master Mode: Clock generated by transmitter or receiver
0.35T
–
–
tr
0.35T
–
–
tr
Slave Mode: Clock accepted by transmitter or receiver
–
0.35T
–
tr
–
0.35T
–
tr
–
–
0.15T
Transmitter
–
–
–
0
–
–
–
–
–
–
–
–
2
S signals are:
2
S WS is low, and right-channel data is transmitted when I
Lower Limit
Max.
Min.
–
T
r
–
0.35T
tr
–
0.35T
tr
–
–
0.35T
–
–
0.35T
–
–
tr
0.8T
–
–
–
Receiver
–
–
–
–
CYW43353
2
S SDO always stays as an output. The
2
S WS transition, synchronous with
Receiver
Upper Limit
Max.
Min.
Max.
–
–
–
–
–
–
–
–
–
–
–
tr
–
–
tr
–
–
–
–
–
–
–
–
0.2T
–
–
r
0
–
–
2
S bus,
2
S WS
Notes
1
2
2
3
3
4
5
4
6
6
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