Infineon Cypress CYW43353 Manual page 46

9.2.1.5. Status
The gSPI interface supports status notification to the host after a read/write transaction. This status notification provides information
about any packet errors, protocol errors, information about available packet in the RX queue, etc. The status information helps in
reducing the number of interrupts to the host. The status-reporting feature can be switched off using a register bit, without any timing
overhead. The gSPI bus timing for read/write transactions with and without status notification are as shown in
Figure 24. See Table 13 for information on status field details.
Write
Write‐Read
Read
Document Number: 002-14949 Rev. *G
PRELIMINARY
Figure 23. gSPI Signal Timing Without Status (32-bit Big Endian)
cs cs cs
sclk sclk sclk
mosi mosi mosi
C31 C31 C31 C31 C30 C30 C30 C30
Command 32 bits Command 32 bits Command 32 bits
cs cs cs
sclk sclk sclk
mosi mosi mosi C31 C31 C31 C30 C30 C30
miso miso miso
Command Command Command
32 bits 32 bits 32 bits
cs cs cs
sclk sclk sclk
mosi mosi mosi
C31 C31 C31 C30 C30 C30
miso miso miso
Command Command Command
32 bits 32 bits 32 bits
C1 C1 C1 C1 C0 C0 C0 C0 D31 D31 D31 D31 D30 D30 D30 D30
Write Data 16*n bits Write Data 16*n bits Write Data 16*n bits
C0 C0 C0
D31 D31 D31
Response Response Response
Delay Delay Delay
C0 C0 C0
Response Response Response
Delay Delay Delay
D1 D1 D1 D1 D0 D0 D0 D0
D30 D30 D30 D1 D1 D1 D0 D0 D0
Read Data 16*n bits Read Data 16*n bits Read Data 16*n bits
D31 D31 D31 D30 D30 D30 D0 D0 D0
Read Data Read Data Read Data
16*n bits 16*n bits 16*n bits
CYW43353
Figure 23 and
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