Lnldo - Infineon Cypress CYW43353 Manual

16.5 LNLDO

Table 41. LNLDO Specifications
Specification
Input supply voltage, Vin
Output current
Output voltage, V
o
Dropout voltage
Output voltage DC accuracy
Quiescent current
Line regulation
Load regulation
Leakage current
Output noise
PSRR
LDO turn-on time
External output capacitor, C
External input capacitor
1. Minimum capacitor value refers to the residual capacitor value after taking into account the part-to-part tolerance, DC-bias, temperature, and aging.
Document Number: 002-14949 Rev. *G
PRELIMINARY
Min. = 1.2V + 0.15V = 1.35V dropout voltage requirement
o
must be met under maximum load.
–
Programmable in 25 mV steps. Default = 1.2V
At maximum load
Includes line/load regulation
No load
Max. load
V from (V + 0.1V) to 1.5V, max load
in o
Load from 1 mA to 150 mA
Power-down
@30 kHz, 60–150 mA load C
@100 kHz, 60–150 mA load C
@ 1kHz, Input > 1.35V, C
LDO turn-on time when rest of chip is up
Total ESR (trace/capacitor): 5 mΩ–240 mΩ
o
Only use an external input capacitor at the VDD_LDO pin
if it is not supplied from CBUCK output.
Total ESR (trace/capacitor): 30 mΩ–200 mΩ
Notes
= 2.2 µF
o
= 2.2 µF
o
= 2.2 µF, V = 1.2V
o o
CYW43353
Min. Typ. Max.
1.3 1.35 1.5
0.1 – 150
1.1 1.2 1.275
– – 150
–4 – +4
– 44 –
– 970 990
– – 5
– 0.02 0.05
– – 10
– – 60
35
20 – –
– 140 180
2.2 4.7
1
0.5
– 1 2.2
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Units
V
mA
V
mV
%
µA
µA
mV/V
mV/mA
µA
nV/rt Hz
nV/rt Hz
dB
µs
µF
µF