Configuration Dip Switch Sw11; Default Jumper Settings - Xilinx VC707 User Manual

Evaluation board for the virtex-7 fpga
Hide thumbs Also See for VC707:
Table of Contents

Advertisement

Default Switch and Jumper Settings
Appendix A:

Configuration DIP Switch SW11

See
are listed in
X-Ref Target - Figure A-2
The default mode setting M[2:0] = 010 selects Master BPI configuration at board power-on.
Table A-2: SW11 Default Switch Settings

Default Jumper Settings

See
Table A-3: Default Jumper Settings
Callout
Jumper
1
J6
SFP Enable
2
J9
XADC GND ferrite filter bypass jumper
3
J10
XADC GND-to-XADC_AGND jumper
4
J11
TI Controller U42 Addr 52 Reset jumper
5
J12
TI Controller U43 Addr 53 Reset jumper
6
J13
USB Mini-B Connector J2 VBUS
7
J14
USB SMBC U8 CLKOUT selector
8
J38
SFP RX Rate: 1-2 = Full BW Rate, 2-3 = Low BW Rate
9
J39
SFP TX Rate: 1-2 = Full BW Rate, 2-3 = Low BW Rate
10
J42
XADC external 1.2V or internal VREFP selector
82
Send Feedback
Figure 1-2
Item 29 for location of SW11. Default settings are shown in
Table
A-2.
ON Position = 1
Figure A-2: SW11 Default Settings
Position
Function
1
FLASH_A25
2
FLASH_A24
3
FPGA_M2
4
FPGA_M1
5
FPGA_M0
Figure A-3
for locations of jumpers listed in
Function
www.xilinx.com
1
2 3 4 5
OFF Position = 0
UG885_aB_02_020612
Default
A25
Off
A24
Off
M0
Off
M1
On
M3
Off
Table
A-3.
Default Jumper
Position
None
None
None
None
None
None
UG885 (v1.8) February 20, 2019
Figure A-2
and details
Schematic
0381418 Page
Number
31
40
1–2
40
46
50
44
44
1–2
31
1–2
31
1–2
40
VC707 Evaluation Board

Advertisement

Table of Contents
loading

Table of Contents