Electrostatic Discharge Caution - Xilinx VC707 User Manual

The VC707 board block diagram is shown in
for download from the VC707 Evaluation Kit product page on the Docs & Designs tab at
www.xilinx.com/vc707.

Electrostatic Discharge Caution

To prevent ESD damage:
VC707 Evaluation Board
UG885 (v1.8) February 20, 2019
• USB JTAG configuration port
• Platform cable header JTAG configuration port
ESD can damage electronic components when they are improperly handled, and can
Caution!
result in total or intermittent failures. Always follow ESD-prevention procedures when removing
and replacing components.
• Use an ESD wrist or ankle strap and ensure that it makes skin contact. Connect the
equipment end of the strap to an unpainted metal surface on the chassis.
• Avoid touching the adapter against your clothing. The wrist strap protects components
from ESD on the body only.
• Handle the adapter by its bracket or edges only. Avoid touching the printed circuit board
or the connectors.
• Put the adapter down only on an antistatic surface such as the bag supplied in your kit.
• If you are returning the adapter to Xilinx Product Support, place it back in its antistatic bag
immediately.
www.xilinx.com
Figure 1-1. The VC707 board schematics are available
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