Xilinx VC707 User Manual page 65

Table 1-27: J35 VITA 57.1 FMC HPC Connections (Cont'd)
J35
FMC 1
Schematic Net Name
HPC
Pin
J2 NC
J3 NC
J6 FMC1_HPC_HA03_P
J7 FMC1_HPC_HA03_N
J9 FMC1_HPC_HA07_P
J10 FMC1_HPC_HA07_N
J12 FMC1_HPC_HA11_P
J13 FMC1_HPC_HA11_N
J15 FMC1_HPC_HA14_P
J16 FMC1_HPC_HA14_N
J18 FMC1_HPC_HA18_P
J19 FMC1_HPC_HA18_N
J21 FMC1_HPC_HA22_P
J22 FMC1_HPC_HA22_N
J24 FMC1_HPC_HB01_P
J25 FMC1_HPC_HB01_N
J27 FMC1_HPC_HB07_P
J28 FMC1_HPC_HB07_N
J30 FMC1_HPC_HB11_P
J31 FMC1_HPC_HB11_N
J33 FMC1_HPC_HB15_P
J34 FMC1_HPC_HB15_N
J36 FMC1_HPC_HB18_P
J37 FMC1_HPC_HB18_N
J39 FMC1_VIO_B_M2C
Notes:
1. No I/O standards are associated with MGT connections.
VC707 Evaluation Board
UG885 (v1.8) February 20, 2019
J35
I/O
U1 FPGA FMC 1
Standard
Pin HPC
Pin
K1
K4
LVCMOS18 H33 K5
LVCMOS18 G33 K7
LVCMOS18 C38 K8
LVCMOS18 C39 K10
LVCMOS18 J37 K11
LVCMOS18 J38 K13
LVCMOS18 E37 K14
LVCMOS18 E38 K16
LVCMOS18 F39 K17
LVCMOS18 E39 K19
LVCMOS18 F36 K20
LVCMOS18 F37 K22
LVCMOS18 H28 K23
LVCMOS18 H29 K25
LVCMOS18 G26 K26
LVCMOS18 G27 K28
LVCMOS18 K22 K29
LVCMOS18 J22 K31
LVCMOS18 M21 K32
LVCMOS18 L21 K34
LVCMOS18 G21 K35
LVCMOS18 G22 K37
K38
BANK 36 K40
VCCO
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Schematic Net Name
NC
NC
NC
FMC1_HPC_HA02_P
FMC1_HPC_HA02_N
FMC1_HPC_HA06_P
FMC1_HPC_HA06_N
FMC1_HPC_HA10_P
FMC1_HPC_HA10_N
FMC1_HPC_HA17_CC_P
FMC1_HPC_HA17_CC_N
FMC1_HPC_HA21_P
FMC1_HPC_HA21_N
FMC1_HPC_HA23_P
FMC1_HPC_HA23_N
FMC1_HPC_HB00_CC_P
FMC1_HPC_HB00_CC_N
FMC1_HPC_HB06_CC_P
FMC1_HPC_HB06_CC_N
FMC1_HPC_HB10_P
FMC1_HPC_HB10_N
FMC1_HPC_HB14_P
FMC1_HPC_HB14_N
FMC1_HPC_HB17_CC_P
FMC1_HPC_HB17_CC_N
FMC1_VIO_B_M2C
Send Feedback
Feature Descriptions
U1
I/O
FPGA
Standard
Pin
LVCMOS18 E33
LVCMOS18 D33
LVCMOS18 G36
LVCMOS18 G37
LVCMOS18 H38
LVCMOS18 G38
LVCMOS18 C35
LVCMOS18 C36
LVCMOS18 D37
LVCMOS18 D38
LVCMOS18 A35
LVCMOS18 A36
LVCMOS18 J25
LVCMOS18 J26
LVCMOS18 K23
LVCMOS18 J23
LVCMOS18 M22
LVCMOS18 L22
LVCMOS18 J21
LVCMOS18 H21
LVCMOS18 M24
LVCMOS18 L24
BANK 36
VCCO
65