Xilinx VC707 User Manual page 61

Table 1-27
Table 1-27: J35 VITA 57.1 FMC HPC Connections
J35
FMC 1
Schematic Net Name
HPC
Pin
A2 FMC1_HPC_DP1_M2C_P
A3 FMC1_HPC_DP1_M2C_N
A6 FMC1_HPC_DP2_M2C_P
A7 FMC1_HPC_DP2_M2C_N
A10 FMC1_HPC_DP3_M2C_P
A11 FMC1_HPC_DP3_M2C_N
A14 FMC1_HPC_DP4_M2C_P
A15 FMC1_HPC_DP4_M2C_N
A18 FMC1_HPC_DP5_M2C_P
A19 FMC1_HPC_DP5_M2C_N
A22 FMC1_HPC_DP1_C2M_P
A23 FMC1_HPC_DP1_C2M_N
A26 FMC1_HPC_DP2_C2M_P
A27 FMC1_HPC_DP2_C2M_N
A30 FMC1_HPC_DP3_C2M_P
A31 FMC1_HPC_DP3_C2M_N
A34 FMC1_HPC_DP4_C2M_P
A35 FMC1_HPC_DP4_C2M_N
A38 FMC1_HPC_DP5_C2M_P
A39 FMC1_HPC_DP5_C2M_N
VC707 Evaluation Board
UG885 (v1.8) February 20, 2019
lists the connections between the FMC1 HPC J35 connector and the FPGA U1.
J35
I/O
U1 FPGA FMC 1
Standard
Pin HPC
Pin
(1)
C6 B1
(1)
C5 B4
(1)
B8 B5
(1)
B7 B8
(1)
A6 B9
(1)
A5 B12
(1)
H8 B13
(1)
H7 B16
(1)
G6 B17
(1)
G5 B20
(1)
D4 B21
(1)
D3 B24
(1)
C2 B25
(1)
C1 B28
(1)
B4 B29
(1)
B3 B32
(1)
J2 B33
(1)
J1 B36
(1)
H4 B37
(1)
H3 B40
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Schematic Net Name
NC
NC
NC
NC
NC
FMC1_HPC_DP7_M2C_P
FMC1_HPC_DP7_M2C_N
FMC1_HPC_DP6_M2C_P
FMC1_HPC_DP6_M2C_N
FMC1_HPC_GBTCLK1_M2C_P
FMC1_HPC_GBTCLK1_M2C_N
NC
NC
NC
NC
FMC1_HPC_DP7_C2M_P
FMC1_HPC_DP7_C2M_N
FMC1_HPC_DP6_C2M_P
FMC1_HPC_DP6_C2M_N
NC
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Feature Descriptions
U1
I/O
FPGA
Standard
Pin
(1)
E6
(1)
E5
(1)
F8
(1)
F7
(1)
E10
(1)
E9
(1)
F4
(1)
F3
(1)
G2
(1)
G1
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