Xilinx VC707 User Manual page 24

VC707 Evaluation Board Features
Chapter 1:
The connections between the USB mini-B connector at J2 and the PHY at U8 are listed in
Table 1-6: USB Connector Pin Assignments and Signal Definitions Between J2 and U8
USB Connector
J2
Pin Name
1 VBUS USB_SMSC_VBUS
2 D_N USB_SMSC_HEADER_N
3 D_P USB_SMSC_HEADER_P
4 GND USB_SMC_GND
The connections between the USB 2.0 PHY at U8 and the FPGA are listed in
Table 1-7: USB 2.0 ULPI Transceiver Connections to the FPGA
24
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Net Name
+5V from host system
Bidirectional differential serial data (N-side)
Bidirectional differential serial data (P-side)
Signal ground
FPGA (U1) Pin
AV36 USB_SMSC_DATA0
AW36 USB_SMSC_DATA1
BA34 USB_SMSC_DATA2
BB34 USB_SMSC_DATA3
BA36 USB_SMSC_DATA4
AT34 USB_SMSC_DATA5
AY35 USB_SMSC_DATA6
AW35 USB_SMSC_DATA7
BA35 USB_SMSC_NXT
BB36 USB_SMSC_RESET_B
BB32 USB_SMSC_STP
BB33 USB_SMSC_DIR
AV34 USB_SMSC_REFCLK_OPTION
AY32 USB_SMSC_CLKOUT
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Description
Net Name I/O Standard
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
LVCMOS18
Table
USB3320 (U8)
Pin
22
19
18
33
Table 1-7.
USB3320 (U8) Pin
3
4
5
6
7
9
10
13
2
27
29
31
26
1
VC707 Evaluation Board
UG885 (v1.8) February 20, 2019
1-6.