Gpio Dip Switch - Xilinx ZC702 User Manual

GPIO DIP Switch

[Figure 1-2, callout 19]
Figure 1-23 shows the GPIO DIP switch circuit.
X-Ref Target - Figure 1-23
Table 1-25 lists the GPIO DIP switch connections to XC7Z020 AP SoC U1.
Table 1-25: GPIO DIP Switch Connections to XC7Z020 AP SoC at U1
XC7Z020 AP SoC (U1) Pin
W6
W7
ZC702 Board User Guide
UG850 (v1.3) June 4, 2014
GPIO_DIP_SW1
GPIO_DIP_SW0
R51
4.7kΩ
0.1 W
5%
GND
Figure 1-23: GPIO DIP Switch
Net Name DIP Switch SW12 Pin
GPIO_DIP_SW0
GPIO_DIP_SW1
www.xilinx.com
Feature Descriptions
VADJ
SW12
1 4
2 3
R50
SDA02H1SBD
4.7kΩ
0.1 W
5%
UG850_c1_23_030513
2
1
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