Xilinx VC707 User Manual page 70

Evaluation board for the virtex-7 fpga
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VC707 Evaluation Board Features
Chapter 1:
Table 1-28: J37 VITA 57.1 FMC 2 HPC Connections (Cont'd)
J37
FMC 2
Schematic Net Name
HPC
Pin
J2
NC
J3
NC
J6
FMC2_HPC_HA03_P
J7
FMC2_HPC_HA03_N
J9
FMC2_HPC_HA07_P
J10
FMC2_HPC_HA07_N
J12
FMC2_HPC_HA11_P
J13
FMC2_HPC_HA11_N
J15
FMC2_HPC_HA14_P
J16
FMC2_HPC_HA14_N
J18
FMC2_HPC_HA18_P
J19
FMC2_HPC_HA18_N
J21
FMC2_HPC_HA22_P
J22
FMC2_HPC_HA22_N
J24
FMC2_HPC_HB01_P
J25
FMC2_HPC_HB01_N
J27
FMC2_HPC_HB07_P
J28
FMC2_HPC_HB07_N
J30
FMC2_HPC_HB11_P
J31
FMC2_HPC_HB11_N
J33
FMC2_HPC_HB15_P
J34
FMC2_HPC_HB15_N
J36
FMC2_HPC_HB18_P
J37
FMC2_HPC_HB18_N
J39
FMC2_VIO_B_M2C
Notes:
1. No I/O standards are associated with MGT connections.
70
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I/O
U1 FPGA
FMC 2
Standard
Pin
HPC
K1
K4
AA29
K5
LVCMOS18
AA30
K7
LVCMOS18
AC31
K8
LVCMOS18
AD31
K10
LVCMOS18
AE34
K11
LVCMOS18
AE35
K13
LVCMOS18
AF35
K14
LVCMOS18
AF36
K16
LVCMOS18
AB36
K17
LVCMOS18
AB37
K19
LVCMOS18
Y35
K20
LVCMOS18
AA36
K22
LVCMOS18
AM16
K23
LVCMOS18
AN16
K25
LVCMOS18
BB19
K26
LVCMOS18
BB18
K28
LVCMOS18
AM18
K29
LVCMOS18
AM17
K31
LVCMOS18
AL19
K32
LVCMOS18
AM19
K34
LVCMOS18
AJ18
K35
LVCMOS18
AJ17
K37
LVCMOS18
K38
BANK 32
K40
VCCO
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J37
Schematic Net Name
Pin
NC
NC
NC
FMC2_HPC_HA02_P
FMC2_HPC_HA02_N
FMC2_HPC_HA06_P
FMC2_HPC_HA06_N
FMC2_HPC_HA10_P
FMC2_HPC_HA10_N
FMC2_HPC_HA17_CC_P
FMC2_HPC_HA17_CC_N
FMC2_HPC_HA21_P
FMC2_HPC_HA21_N
FMC2_HPC_HA23_P
FMC2_HPC_HA23_N
FMC2_HPC_HB00_CC_P
FMC2_HPC_HB00_CC_N
FMC2_HPC_HB06_CC_P
FMC2_HPC_HB06_CC_N
FMC2_HPC_HB10_P
FMC2_HPC_HB10_N
FMC2_HPC_HB14_P
FMC2_HPC_HB14_N
FMC2_HPC_HB17_CC_P
FMC2_HPC_HB17_CC_N
FMC2_VIO_B_M2C
I/O
U1 FPGA
Standard
Pin
AC30
LVCMOS18
AD30
LVCMOS18
AB31
LVCMOS18
AB32
LVCMOS18
AF31
LVCMOS18
AF32
LVCMOS18
AC34
LVCMOS18
AD35
LVCMOS18
AA34
LVCMOS18
AA35
LVCMOS18
Y37
LVCMOS18
AA37
LVCMOS18
AT17
LVCMOS18
AU17
LVCMOS18
AY18
LVCMOS18
AY17
LVCMOS18
AP20
LVCMOS18
AR19
LVCMOS18
AK19
LVCMOS18
AK18
LVCMOS18
AW18
LVCMOS18
AW17
LVCMOS18
BANK 32
VCCO
VC707 Evaluation Board
UG885 (v1.8) February 20, 2019

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