Xilinx VC707 User Manual page 66

VC707 Evaluation Board Features
Chapter 1:
Table 1-28
Note:
XC7VX485T-2FFG1761C FPGA installed on the VC707. Refer to the Virtex-7 FPGA VC707
Evaluation Kit Master Answer Record in
Table 1-28: J37 VITA 57.1 FMC 2 HPC Connections
J37
FMC 2
Schematic Net Name
HPC
Pin
A2 FMC2_HPC_DP1_M2C_P
A3 FMC2_HPC_DP1_M2C_N
A6 FMC2_HPC_DP2_M2C_P
A7 FMC2_HPC_DP2_M2C_N
A10 FMC2_HPC_DP3_M2C_P
A11 FMC2_HPC_DP3_M2C_N
A14 FMC2_HPC_DP4_M2C_P
A15 FMC2_HPC_DP4_M2C_N
A18 FMC2_HPC_DP5_M2C_P
A19 FMC2_HPC_DP5_M2C_N
A22 FMC2_HPC_DP1_C2M_P
A23 FMC2_HPC_DP1_C2M_N
A26 FMC2_HPC_DP2_C2M_P
A27 FMC2_HPC_DP2_C2M_N
A30 FMC2_HPC_DP3_C2M_P
A31 FMC2_HPC_DP3_C2M_N
A34 FMC2_HPC_DP4_C2M_P
A35 FMC2_HPC_DP4_C2M_N
A38 FMC2_HPC_DP5_C2M_P
A39 FMC2_HPC_DP5_C2M_N
66
Send Feedback
lists the connections between the FMC2 HPC J37 connector and the FPGA U1.
The FMC2 HPC HB00-HB21 pair connections are not available with the
I/O U1 FPGA
Standard Pin
(1) N6
(1)
N5
(1) L6
(1) L5
(1)
J6
(1)
J5
(1)
W6
(1)
W5
(1)
V4
(1)
V3
(1)
M4
(1)
M3
(1) L2
(1) L1
(1) K4
(1)
K3
(1)
U2
(1)
U1
(1)
T4
(1)
T3
www.xilinx.com
Appendix G: References
J37
FMC 2
Schematic Net Name
HPC
Pin
B1 NC
B4 NC
B5 NC
B8 NC
B9 NC
B12 FMC2_HPC_DP7_M2C_P
B13 FMC2_HPC_DP7_M2C_N
B16 FMC2_HPC_DP6_M2C_P
B17 FMC2_HPC_DP6_M2C_N
B20 FMC2_HPC_GBTCLK1_M2C_P
B21 FMC2_HPC_GBTCLK1_M2C_N
B24 NC
B25 NC
B28 NC
B29 NC
B32 FMC2_HPC_DP7_C2M_P
B33 FMC2_HPC_DP7_C2M_N
B36 FMC2_HPC_DP6_C2M_P
B37 FMC2_HPC_DP6_C2M_N
B40 NC
for more information.
I/O U1 FPGA
Standard Pin
(1)
R6
(1)
R5
(1)
U6
(1)
U5
(1)
T8
(1)
T7
(1)
P4
(1)
P3
(1)
R2
(1)
R1
VC707 Evaluation Board
UG885 (v1.8) February 20, 2019