Channel Status - Chroma 63610-80-20 Operation & Programming Manual

Programmable dc electronic load
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6.2.1 Channel Status

The Channel Status register informs you one or more channel status conditions, which
indicate certain errors or faults have occurred to a specific channel. Table 6-1 explains
the channel status conditions that are applied to the electronic load.
When the bits of the Channel Status Condition register are set, the corresponding
condition is true.
Program the PTR/NTR filter to select the way of condition transition in the Channel
Status Condition register that will be set in the Event registers.
Reading the Channel Status Event register resets itself to zero.
The Channel Status Enable register can be programmed to specify the channel status
event bit that is logically ORed to become the corresponding channel bit in Channel
Summary Event register.
Mnemonic Bit Value
OTP
0
OVP
1
OCP
2
OPP
3
REV
4
SYNC
5
MAX LIM
6
FAN
7
REMOTE
8
INHIBIT
Table 6-1 Bit Description of Channel Status
1
Over temperature. When over temperature condition has
occurred on a channel, Bit 0 is set and the channel is turned
off. It remains set until the channel has cooled down below the
over temperature trip point and LOAD:PROT:CLE is
programmed.
2
Over voltage. When an over voltage condition has occurred on
a channel, Bit 1 is set and remains set until the over voltage
condition is removed and LOAD:PROT:CLE is programmed.
4
Over current. When an over current condition has occurred on
a channel, Bit 2 is set and remains set until the over current
condition is removed and LOAD:PROT:CLE is programmed.
8
Over power. An overpower condition has occurred on a
channel, Bit 3 is set and remains set until the over power
condition is removed and LOAD:PROT:CLE is programmed.
16
Reverse voltage on input. When a channel has a reverse
voltage applied to it, Bit 4 is set. It remains set until the reverse
voltage is removed and LOAD:PROT:CLE is programmed.
32
Synchronize timeout. When a synchronize timeout condition
has occurred on a channel, Bit 5 is set and remains set until the
synchronize timeout condition is removed and
LOAD:PROT:CLE is programmed.
64
Maximum sine wave current limit. When this condition has
occurred on a channel, Bit 6 is set and remains set until the
condition is removed and LOAD:PROT:CLE is programmed.
128 FAN fail. When a FAN failure condition has occurred on a
channel, Bit 7 is set and remains set until the fan failure
condition is removed and LOAD:PROT:CLE is programmed.
256 Remote inhibit. When a Remote inhibit condition has occurred
on a Frame, Bit 8 is set and remains set until the remote inhibit
condition is removed and LOAD:PROT:CLE is programmed.
Meaning
Status Reporting
6-3

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