Standard Event Status; Status Byte Register - Chroma 63610-80-20 Operation & Programming Manual

Programmable dc electronic load
Table of Contents

Advertisement

6.2.5 Standard Event Status

All programming errors that have occurred will set one or more error bits in the Standard
Event Status register. Table 6-3 describes the standard events that apply to the
electronic load.
Reading the Standard Event Status register will reset it to zero.
The Standard Event Enable register can be programmed to specify the standard event
bit that is logically ORed to become Bit 5 (ESB bit) in the Status Byte register.
Mnemonic Bit Value
OPC
0
1
QYE
2
4
DDE
3
8
EXE
4
16
CME
5
32
6.2.6

Status Byte Register

The Status Byte register summarizes all of the status events for all status registers.
Table 6-4 describes the status events that are applied to the electronic load.
The Status Byte register can be read with a serial of pull or *STB? query.
The RQS bit is the only bit that is automatically cleared after a serial of pull.
When the Status Byte register is read with a *STB? query, Bit 6 of the Status Byte
register will contain the MSS bit. The MSS bit indicates that the load has at least one
reason for requesting service. *STB? does not affect the status byte.
The Status Byte register is cleared by *CLS command.
Mnemonic Bit Value
CSUM
2
4
QUES
3
8
MAV
4
16
ESB
5
32
RQS/MSS 6
64
Table 6-3 Bit Description of Standard Event Status
Operation Complete. This event bit generated is responding to
the *OPC command. It indicates that the device has completed
all of the selected pending operations.
Query Error. The output queue was read when no data were
present or the data in the queue were lost.
Device Dependent Error. Memory was lost, or self-test failed.
Execution Error. A command parameter was out of the legal
range or inconsistent with the electronic load's operation, or the
command could not be executed due to some operating
conditions.
Command Error. A syntax or semantic error has occurred, or the
electronic load has received a <GET> message from program.
Table 6-4 Bit Description of Status Byte
Channel Summary. It indicates if an enabled channel event has
occurred. It is affected by Channel Condition, Channel Event and
Channel Summary Event registers.
Questionable. It indicates if an enabled questionable event has
occurred.
Message Available. It indicates if the Output Queue contains
data.
Event Status Bit. It indicates if an enabled standard event has
occurred.
Request Service/Master Summary Status. During a serial of pull,
RQS is returned and cleared. For a *STB? query, MSS is
returned without being cleared.
Meaning
Meaning
Status Reporting
6-5

Advertisement

Table of Contents
loading

Table of Contents