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BUMP, Remote, and Special Asynchronus Lines Test
These tests are meant to check the Asynchronus lines of the Standard I/O and the
Asynchronus Lines controller in the Super I/O. These tests contain sub-tests, which are
described as follows. Each sub-test saves and restores the line parameters. When an error
is detected, it is reported to the operator with a suitable error message.
Internal Registers TestThis test is performed at Power On and does Read / Write operation
Buffers Exchange Test
Junction Signals Test This test is also conducted in internal loop back mode and is
Flash EPROM Test
This test checks the content of the Flash EPROM. It contains one sub-test:
Check-Sum Test
A-4
Operator Guide
of approved values, in the Asynchronus lines register of the Super
I/O. The following registers are checked:
1. LCR
2. SCR
3. DLL
4. DLM
5. IER
6. MCR
This test sends two ASCII characters in the following four
configurations and checks the received characters. This test is in
internal loop back mode and is performed at Power On. The
following eight configurations are used:
1. 38400 bds 8 bits 2 stop Even parity
2. 19200 bds 8 bits 2 stop Even parity
3. 9600 bds 8 bits 2 stop Even parity
4. 4800 bds 8 bits 2 stop Even parity
5. 1200 bds 8 bits 2 stop Even parity
6. 300 bds 8 bits 2 stop Even parity
7. 150 bds 8 bits 2 stop Even parity
8. 75 bds 8 bits 2 stop Even parity
performed at Power On. The following loop backs are used:
1. RTS –> CTS
2. DTR –> DSR
3. OUT1 –> R1
4. OUT2 –> DCD
In this test Flash EPROM is divided into different areas and Area
CRC is calculated. Then the Registered CRC is read and compared
with the calculated CRC.

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R40, R50

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