Tout Output Control - Epson S1C17M20 Technical Manual

15 16-BIT PWM TIMERS (T16B)

15.4.4 TOUT Output Control

Comparator mode can generate TOUT signals using the comparator MATCH and counter MAX/ZERO signals. The
generated signals can be output to outside the IC. Figure 15.4.4.1 shows the TOUT output circuits (circuits 0 and 1).
ZERO signal
MAX signal
Each timer channel includes two (four, or six) TOUT output circuits and their signal generation and output can be
controlled individually.
TOUT generation mode
The T16BnCCCTLm.TOUTMD[2:0] bits are used to set how the TOUT signal waveform is changed by the
MATCH and MAX/ZERO signals.
Furthermore, when the T16BnCCCTLm.TOUTMT bit is set to 1, the TOUT circuit uses the MATCH signal out-
put from another system in the circuit pair (0 and 1, 2 and 3, 4 and 5). This makes it possible to change the signal
twice within a counter cycle.
TOUT signal polarity
The TOUT signal polarity (active level) can be set using the T16BnCCCTLm.TOUTINV bit. It is set to active
high by setting the T16BnCCCTLm.TOUTINV bit to 0 and active low by setting to 1.
Figures 15.4.4.2 and 15.4.4.3 show the TOUT output waveforms.
15-16
Comparator/capture block Ch.n
T16BnCCCTL0 register
TOUTINV
TOUTMT
TOUTO
TOUTMD[2:0]
MATCH signal
Comparator 0
Comparator 1 MATCH signal
TOUTMT
TOUTO
TOUTMD[2:0]
TOUTINV
T16BnCCCTL1 register
Figure 15.4.4.1 TOUT Output Circuits (Circuits 0 and 1)
Seiko Epson Corporation
TOUT
output control
0
TOUT
output control
1
S1C17M20/M21/M22/M23/M24/M25
TECHNICAL MANUAL (Rev. 1.0)
TOUTn0
TOUTn1