Epson S1C17M20 Technical Manual page 280

APPENDIX A LIST OF PERIPHERAL CIRCUIT CONTROL REGISTERS
0x40a0–0x40a4
Address Register name
0x40a0 WDTCLK
(WDT2 Clock Control
Register)
0x40a2 WDTCTL
(WDT2 Control
Register)
0x40a4 WDTCMP
(WDT2 Counter Com-
pare Match Register)
0x40c0–0x40d2
Address Register name
0x40c0 RTCCTL
(RTC Control
Register)
0x40c2 RTCALM1
(RTC Second Alarm
Register)
0x40c4 RTCALM2
(RTC Hour/Minute
Alarm Register)
0x40c6 RTCSWCTL
(RTC Stopwatch
Control Register)
AP-A-4
Bit Bit name
15–9 –
8 DBRUN
7–6 –
5–4 CLKDIV[1:0]
3–2 –
1–0 CLKSRC[1:0]
15–11 –
10–9 MOD[1:0]
8 STATNMI
7–5 –
4 WDTCNTRST
3–0 WDTRUN[3:0]
15–10 –
9–0 CMP[9:0]
Bit Bit name
15 RTCTRMBSY
14–8 RTCTRM[6:0]
7 –
6 RTCBSY
5 RTCHLD
4 RTC24H
3 –
2 RTCADJ
1 RTCRST
0 RTCRUN
15 –
14–12 RTCSHA[2:0]
11–8 RTCSLA[3:0]
7–0 –
15 –
14 RTCAPA
13–12 RTCHHA[1:0]
11–8 RTCHLA[3:0]
7 –
6–4 RTCMIHA[2:0]
3–0 RTCMILA[3:0]
15–12 BCD10[3:0]
11–8 BCD100[3:0]
7–5 –
4 SWRST
3–1 –
0 SWRUN
Seiko Epson Corporation
Watchdog Timer (WDT2)
Initial Reset R/W
0x00 – R
0 H0 R/WP
0x0 – R
0x0 H0 R/WP
0x0 – R
0x0 H0 R/WP
0x00 – R
0x0 H0 R/WP
0 H0 R
0x0 – R
0 H0 WP
0xa H0 R/WP –
0x00 – R
0x3ff H0 R/WP
Real-time Clock (RTCA)
Initial Reset R/W
0 H0 R
0x00 H0 W
0 – R
0 H0 R
0 H0 R/W
0 H0 R/W
0 – R
0 H0 R/W
0 H0 R/W
0 H0 R/W
0 – R
0x0 H0 R/W
0x0 H0 R/W
0x00 – R
0 – R
0 H0 R/W
0x0 H0 R/W
0x0 H0 R/W
0 – R
0x0 H0 R/W
0x0 H0 R/W
0x0 H0 R
0x0 H0 R
0x0 – R
0 H0 W
0x0 – R
0 H0 R/W
S1C17M20/M21/M22/M23/M24/M25
Remarks
–
–
Always read as 0.
–
Remarks
–
Read as 0x00.
–
Cleared by setting the
RTCCTL.RTCRST bit to 1.
–
Cleared by setting the
RTCCTL.RTCRST bit to 1.
–
–
–
–
Read as 0.
–
TECHNICAL MANUAL (Rev. 1.0)