Epson S1C17M20 Technical Manual page 9

13.5.5 Data Transfer in Slave Mode .......................................................................... 13-8
13.5.6 Terminating Data Transfer in Slave Mode ..................................................... 13-10
13.6 Interrupts ..................................................................................................................... 13-10
13.7 Control Registers ........................................................................................................ 13-11
SPIA Ch.n Mode Register ....................................................................................................... 13-11
SPIA Ch.n Control Register ..................................................................................................... 13-12
SPIA Ch.n Transmit Data Register .......................................................................................... 13-13
SPIA Ch.n Receive Data Register ........................................................................................... 13-13
SPIA Ch.n Interrupt Flag Register ........................................................................................... 13-13
SPIA Ch.n Interrupt Enable Register ....................................................................................... 13-14
14 I 2 C (I2C) .......................................................................................................................14-1
14.1 Overview ...................................................................................................................... 14-1
14.2 Input/Output Pins and External Connections .............................................................. 14-2
14.2.1 List of Input/Output Pins ................................................................................ 14-2
14.2.2 External Connections .................................................................................... 14-2
14.3 Clock Settings .............................................................................................................. 14-3
14.3.1 I2C Operating Clock ...................................................................................... 14-3
14.3.2 Clock Supply in DEBUG Mode ...................................................................... 14-3
14.3.3 Baud Rate Generator ..................................................................................... 14-3
14.4 Operations ................................................................................................................... 14-4
14.4.1 Initialization .................................................................................................... 14-4
14.4.2 Data Transmission in Master Mode ............................................................... 14-5
14.4.3 Data Reception in Master Mode .................................................................... 14-7
14.4.4 10-bit Addressing in Master Mode ................................................................ 14-9
14.4.5 Data Transmission in Slave Mode................................................................. 14-10
14.4.6 Data Reception in Slave Mode ..................................................................... 14-12
14.4.7 Slave Operations in 10-bit Address Mode .................................................... 14-14
14.4.8 Automatic Bus Clearing Operation ............................................................... 14-14
14.4.9 Error Detection .............................................................................................. 14-15
14.5 Interrupts ..................................................................................................................... 14-16
14.6 Control Registers ........................................................................................................ 14-17
I2C Ch.n Clock Control Register ............................................................................................. 14-17
I2C Ch.n Mode Register .......................................................................................................... 14-18
I2C Ch.n Baud-Rate Register .................................................................................................. 14-18
I2C Ch.n Own Address Register ............................................................................................. 14-18
I2C Ch.n Control Register ....................................................................................................... 14-19
I2C Ch.n Transmit Data Register ............................................................................................. 14-20
I2C Ch.n Receive Data Register .............................................................................................. 14-20
I2C Ch.n Status and Interrupt Flag Register ........................................................................... 14-20
I2C Ch.n Interrupt Enable Register ......................................................................................... 14-21
15 16-bit PWM Timers (T16B) ........................................................................................15-1
15.1 Overview ...................................................................................................................... 15-1
15.2 Input/Output Pins ......................................................................................................... 15-2
15.3 Clock Settings .............................................................................................................. 15-3
15.3.1 T16B Operating Clock ................................................................................... 15-3
15.3.2 Clock Supply in SLEEP Mode ....................................................................... 15-3
15.3.3 Clock Supply in DEBUG Mode ...................................................................... 15-3
15.3.4 Event Counter Clock ...................................................................................... 15-3
15.4 Operations ................................................................................................................... 15-4
15.4.1 Initialization .................................................................................................... 15-4
15.4.2 Counter Block Operations ............................................................................. 15-5
15.4.3 Comparator/Capture Block Operations ......................................................... 15-8
15.4.4 TOUT Output Control ................................................................................... 15-16
S1C17M20/M21/M22/M23/M24/M25
TECHNICAL MANUAL (Rev. 1.0)
Seiko Epson Corporation
CONTENTS
vii