External Connections; Clock Settings; Remc3 Operating Clock; Clock Supply In Sleep Mode - Epson S1C17M20 Technical Manual

17 IR REMOTE CONTROLLER (REMC3)
If the port is shared with the REMC3 pin and other functions, the REMC3 output function must be assigned to the
port before activating the REMC3. For more information, refer to the "I/O Ports" chapter.

17.2.2 External Connections

Figure 17.2.2.1 shows a connection example between the REMC3 and an external infrared module.
Figure 17.2.2.1 Connection Example Between REMC3 and External Infrared Module

17.3 Clock Settings

17.3.1 REMC3 Operating Clock

When using the REMC3, the REMC3 operating clock CLK_REMC3 must be supplied to the REMC3 from the
clock generator. The CLK_REMC3 supply should be controlled as in the procedure shown below.
1. Enable the clock source in the clock generator if it is stopped (refer to "Clock Generator" in the "Power Supply,
Reset, and Clocks" chapter).
2. Set the following REMCLK register bits:
- REMCLK.CLKSRC[1:0] bits
- REMCLK.CLKDIV[3:0] bits

17.3.2 Clock Supply in SLEEP Mode

When using REMC3 during SLEEP mode, the REMC3 operating clock CLK_REMC3 must be configured so that
it will keep supplying by writing 0 to the CLGOSC.xxxxSLPC bit for the CLK_REMC3 clock source.
If the CLGOSC.xxxxSLPC bit for the CLK_REMC3 clock source is 1, the CLK_REMC3 clock source is deacti-
vated during SLEEP mode and REMC3 stops with the register settings maintained at those before entering SLEEP
mode. After the CPU returns to normal mode, CLK_REMC3 is supplied and the REMC3 operation resumes.

17.3.3 Clock Supply in DEBUG Mode

The CLK_REMC3 supply during DEBUG mode should be controlled using the REMCLK.DBRUN bit.
The CLK_REMC3 supply to the REMC3 is suspended when the CPU enters DEBUG mode if the REMCLK.
DBRUN bit = 0. After the CPU returns to normal mode, the CLK_REMC3 supply resumes. Although the REMC3
stops operating when the CLK_REMC3 supply is suspended, the output pin and registers retain the status before
DEBUG mode was entered. If the REMCLK.DBRUN bit = 1, the CLK_REMC3 supply is not suspended and the
REMC3 will keep operating in DEBUG mode.

17.4 Operations

17.4.1 Initialization

The REMC3 should be initialized with the procedure shown below.
1. Write 1 to the REMDBCTL.REMCRST bit.
2. Configure the REMCLK.CLKSRC[1:0] and REMCLK.CLKDIV[3:0] bits. (Configure operating clock)
3. Assign the REMC3 output function to the port. (Refer to the "I/O Ports" chapter.)
17-2
TXD
REMO
V
V
DD
LEDA
S1C17 REMC3
(Clock source selection)
(Clock division ratio selection = Clock frequency setting)
Seiko Epson Corporation
CC
IR transmitter module
(Reset REMC3)
S1C17M20/M21/M22/M23/M24/M25
TECHNICAL MANUAL (Rev. 1.0)