Uart3 Ch.n Baud-Rate Register - Epson S1C17M20 Technical Manual

Cmos 16-bit single chip microcontroller
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Bit 6
PUEN
This bit enables pull-up of the USINn pin.
1 (R/W): Enable pull-up
0 (R/W): Disable pull-up
Bit 5
OUTMD
This bit sets the USOUTn pin output mode.
1 (R/W): Open-drain output
0 (R/W): Push-pull output
Bit 4
IRMD
This bit enables the IrDA interface function.
1 (R/W): Enable IrDA interface function
0 (R/W): Disable IrDA interface function
Bit 3
CHLN
This bit sets the data length.
1 (R/W): 8 bits
0 (R/W): 7 bits
Bit 2
PREN
This bit enables the parity function.
1 (R/W): Enable parity function
0 (R/W): Disable parity function
Bit 1
PRMD
This bit selects either odd parity or even parity when using the parity function.
1 (R/W): Odd parity
0 (R/W): Even parity
Bit 0
STPB
This bit sets the stop bit length.
1 (R/W): 2 bits
0 (R/W): 1 bit
Notes: • The UAnMOD register settings can be altered only when the UAnCTL.MODEN bit = 0.
• Do not set both the UAnMOD.IRMD and UAnMOD.CAREN bits simultaneously.
UART3 Ch.n Baud–Rate Register
Register name
Bit
UAnBR
15–12 –
11–8 FMD[3:0]
7–0 BRT[7:0]
Bits 15–12 Reserved
Bits 11–8 FMD[3:0]
Bits 7–0
BRT[7:0]
These bits set the UART3 transfer rate. For more information, refer to "Baud Rate Generator."
Notes: • The UAnBR register settings can be altered only when the UAnCTL.MODEN bit = 0.
• Do not set the UAnBR.FMD[3:0] bits to a value other than 0 to 3 when the UAnMOD.BRDIV
bit = 1.
S1C17M20/M21/M22/M23/M24/M25
TECHNICAL MANUAL (Rev. 1.0)
Bit name
Initial
0x0
0x0
0x00
Seiko Epson Corporation
Reset
R/W
R
H0
R/W
H0
R/W
12 UART (UART3)
Remarks
12-11

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