Configuration Of Watchdog Timer - NEC 78K0S/KB1+ User Manual

9.2

Configuration of Watchdog Timer

The watchdog timer consists of the following hardware.
Control registers
2 Clock
f /2
RL
input
4
f /2
X
controller
2
Watchdog timer enable
register (WDTE)
Remarks 1. f : Low-speed internal oscillation clock frequency
RL
2. f : System clock oscillation frequency
X
150
CHAPTER 9 WATCHDOG TIMER
Table 9-3. Configuration of Watchdog Timer
Item
Watchdog timer mode register (WDTM)
Watchdog timer enable register (WDTE)
Figure 9-1. Block Diagram of Watchdog Timer
11
2 /f to
RL
18
2 /f
RL
16-bit
Selector
counter
or
13
2 /f to
X
20
2 /f
X
Clear
0 1 1
WDCS4 WDCS3
Watchdog timer mode
register (WDTM)
Internal bus
User's Manual U17446EJ3V1UD
Configuration
Output
controller
3
WDCS2 WDCS1 WDCS0
Internal reset signal
Option byte
(to set "low-speed
internal oscillator cannot be
stopped" or "low-speed
internal oscillator can be
stopped by software")