NEC 78K0S/KB1+ User Manual page 71

OSTS1 OSTS0
System clock oscillation
stabilization time counter
STOP
System clock
Note
oscillator
X1/P121
Crystal/ceramic
oscillation
f
X
X2/P122
External clock
input
High-speed
internal
oscillation
Note Select the high-speed internal oscillator, crystal/ceramic oscillator, or external clock input as the system
clock source by using the option byte.
CHAPTER 5 CLOCK GENERATORS
Figure 5-1. Block Diagram of Clock Generators
Internal bus
Oscillation stabilization Preprocessor clock
time select register (OSTS)
control register (PPCC)
PPCC1 PPCC0
Watchdog timer
Prescaler
f f
X X
2
2 2
Low-speed
internal
oscillator
Option byte
1: Cannot be stopped.
0: Can be stopped.
LSRSTOP
Low-speed internal oscillation
mode register (LSRCM)
Internal bus
User's Manual U17446EJ3V1UD
Processor clock
control register (PCC)
PCC1
f
XP
2
2
f
XP
Prescaler
Clock to peripheral
hardware (f )
XP
8-bit timer H1,
f
RL
watchdog timer
Controller
C
CPU clock
P
(f )
CPU
U
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