Instruction Address Addressing; Relative Addressing - NEC 78K0S/KB1+ User Manual
8-bit single-chip microcontrollers
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Also See for 78K0S/KB1+:
- Application note (49 pages) ,
- Application note (37 pages) ,
- Application note (44 pages)
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Address
Special Function Register (SFR) Name
FFEDH
External interrupt mode register 1
FFF3H
Preprocessor clock control register
FFF4H
Oscillation stabilization time select register
FFFBH
Processor clock control register
Note The oscillation stabilization time that elapses after release of reset is selected by the option byte. For
details, refer to CHAPTER 18 OPTION BYTE.
3.3 Instruction Address Addressing
An instruction address is determined by the program counter (PC) contents. The PC contents are normally
incremented (+1 for each byte) automatically according to the number of bytes of an instruction to be fetched each
time another instruction is executed.
information is set to the PC to branch by the following addressing (for details of each instruction, refer to 78K/0S
Series Instructions User's Manual (U11047E)).
3.3.1 Relative addressing
[Function]
The value obtained by adding 8-bit immediate data (displacement value: jdisp8) of an instruction code to the start
address of the following instruction is transferred to the program counter (PC) to branch. The displacement
value is treated as signed two's complement data (–128 to +127) and bit 7 becomes the sign bit. In other words,
the range of branch in relative addressing is between –128 and +127 of the start address of the following
instruction.
This function is carried out when the BR $addr16 instruction or a conditional branch instruction is executed.
[Illustration]
15
15
15
PC
When S = 0, α indicates that all bits are "0".
When S = 1, α indicates that all bits are "1".
CHAPTER 3 CPU ARCHITECTURE
Table 3-3. Special Function Registers (3/3)
Symbol
INTM1
PPCC
OSTS
PCC
When a branch instruction is executed, the branch destination address
PC
+
8
7
6
α
S
User's Manual U17446EJ3V1UD
R/W
Number of Bits Manipulated
Simultaneously
1 Bit
8 Bits
−
√
R/W
√
√
−
√
√
√
0
... PC is the start address of
the next instruction of
a BR instruction.
0
jdisp8
0
After Reset
16 Bits
−
00H
−
02H
−
Note
Undefined
−
02H
39
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