NEC 78K0S/KB1+ User Manual page 34

PUSH rp
instruction
SP _ 2
SP
Lower half
SP _ 2
register pairs
Upper half
SP _ 1
register pairs
SP
POP rp
instruction
Lower half
SP
register pairs
Upper half
SP + 1
register pairs
SP SP + 2
34
CHAPTER 3 CPU ARCHITECTURE
Figure 3-8. Data to Be Saved to Stack Memory
SP _ 2
SP
SP _ 2
SP _ 1
SP
Figure 3-9. Data to Be Restored from Stack Memory
SP
SP + 1
SP SP + 2
User's Manual U17446EJ3V1UD
CALL, CALLT
instructions
SP _ 3
SP
SP _ 3
SP _ 2
PC7 to PC0
SP _ 1
PC15 to PC8
SP
RET instruction
PC7 to PC0
PC15 to PC8
SP + 1
SP + 2
SP SP + 3
Interrupt
PC7 to PC0
PC15 to PC8
PSW
RETI instruction
SP
PC7 to PC0
PC15 to PC8
PSW