NEC 78K0S/KB1+ User Manual page 307

8-bit single-chip microcontrollers

Hide thumbs Also See for 78K0S/KB1+:

Table of Contents

Note This setting is not required when the watchdog timer is not used.

<1> to <11> in Figure 19-25 correspond to <1> to <11> of internal verify 1 in 19.8.9 (previous page).

Figure 19-25. Example of Internal Verify 1 Operation in Self Programming Mode

Internal verify 1

<1> Set internal verify 1

command (FLCMD = 01H)

<2> Set block no. for

internal verify, to FLAPH

<3> Set 00H to FLAPL

<4> Set the same value as

that of FLAPH to FLAPHC

<6> Clear PFS

<7> Clear & restart WDT counter

(WDTE = ACH)

<8> Execute HALT instruction

<9> Check execution result

(VCERR and WEPRERR flags)

<11> Normal termination

CHAPTER 19 FLASH MEMORY

<10> Abnormal termination

User's Manual U17446EJ3V1UD