NEC 78K0S/KB1+ User Manual page 178

(8) Conversion results just after A/D conversion start
The first A/D conversion value immediately after A/D conversion starts may not fall within the rating range if the
ADCS bit is set to 1 within 1
0. Take measures such as polling the A/D conversion end interrupt request (INTAD) and removing the first
conversion result.
(9) A/D conversion result register (ADCR, ADCRH) read operation
When a write operation is performed to the A/D converter mode register (ADM) and analog input channel
specification register (ADS), the contents of ADCR and ADCRH may become undefined. Read the conversion
result following conversion completion before writing to ADM and ADS. Using a timing other than the above may
cause an incorrect conversion result to be read.
<R>
(10) Operating current at conversion waiting mode
The DC characteristic of the operating current during the STOP mode is not satisfied due to the conversion
waiting mode (only the comparator consumes power), when bit 7 (ADCS) and bit 0 (ADCE) of the A/D converter
mode register (ADM) are set to 0 and 1 respectively.
(11) Internal equivalent circuit
The equivalent circuit of the analog input block is shown below.
Table 10-3. Resistance and Capacitance Values (Reference Values) of Equivalent Circuit
4.5 V ≤ AV
2.7 V ≤ AV
Remarks 1. The resistance and capacitance values shown in Table 10-3 are not guaranteed values.
2. n = 0 to 3
3. R
OUT
R : Analog input equivalent resistance
IN
C : Analog input equivalent capacitance
IN
C
OUT
178
CHAPTER 10 A/D CONVERTER
μ
s after the ADCE bit was set to 1, or if the ADCS bit is set to 1 with the ADCE bit =
Figure 10-21. Internal Equivalent Circuit of ANIn Pin
R
OUT
ANIn
AV R
REF
≤ 5.5 V
1 kΩ
REF
< 4.5 V 1 kΩ
REF
: Allowable signal source impedance
: Internal pin capacitance
User's Manual U17446EJ3V1UD
R
IN
C
OUT
LSI internal
R C
OUT IN
3 kΩ 8 pF
60 kΩ 8 pF
C
IN
C
OUT IN
15 pF
15 pF