NEC 78K0S/KB1+ User Manual page 281

Protect byte
PRSELF4 PRSELF3 PRSELF2 PRSELF1 PRSELF0
5
Flash address
pointer H (FLAPH)
Matched
Flash address
pointer L (FLAPL)
Flash address pointer H Flash address pointer L
compare register compare register
(FLAPHC)
Figure 19-10. Block Diagram of Self Programming
Internal bus
Flash programming command
register (FLCMD)
FLCMD2 FLCMD1 FLCMD0
Self programming mode
setting sequencer
3
Flash memory controller
Erase Write
Increment
circuit
circuit
circuit
Flash memory
Matched
(FLAPLC)
Internal bus
Flash programming mode
control register (FLPMC)
Self programming mode setting register
HALT signal
Self programming command execution
Verify
HALT release signal
circuit
Not matched
Flash write buffer register
WEPRERR VCERR FPRERR
(FLW)
Flash protect command
register (PFCMD)
Flash status register (PFS)