NEC 78K0S/KB1+ User Manual page 261

Figure 17-4. Timing of Low-Voltage Detector Internal Reset Signal Generation
Supply voltage (V )
DD
LVI detection voltage
(V )
LVI
POC detection voltage
(V )
POC
<2>
LVIMK flag
H
(set by software)
LVION flag
(set by software)
LVIF flag
LVIMD flag
(set by software)
Note 3
LVIRF flag
LVI reset signal
POC reset signal
Internal reset signal
Notes 1. The LVIMK flag is set to "1" by reset signal generation.
2. The LVIF flag may be set (1).
3. LVIRF is bit 0 of the reset control flag register (RESF). For details of RESF, refer to CHAPTER 15
RESET FUNCTION.
Remark <1> to <6> in Figure 17-4 above correspond to <1> to <6> in the description of "when starting operation"
in 17.4 (1) When used as reset.
CHAPTER 17 LOW-VOLTAGE DETECTOR
<1>
Note 1
Not cleared
<3>
<4> 0.2 ms or longer
<5>
Note 2
Not cleared
<6>
Cleared by
software
User's Manual U17446EJ3V1UD
Not cleared
Not cleared
Cleared by
software
Time
Clear
Clear
Clear
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