NEC 78K0S/KB1+ User Manual page 264

Figure 17-6. Example of Software Processing After Release of Reset (1/2)
• If supply voltage fluctuation is 50 ms or less in vicinity of LVI detection voltage
Reset
Initialization
processing <1>
Setting LVI
Setting 8-bit timer H1
(50 ms is measured)
Clears WDT
Detection voltage or more
(LVIF = 0 ?)
LVIF = 0
Restarting the timer H1
(TMHE1 = 0 → TMHE1 = 1)
No 50 ms has passed?
(TMIFH1 = 1?)
Initialization
processing <2>
Note A flowchart is shown on the next page.
264
CHAPTER 17 LOW-VOLTAGE DETECTOR
; Check reset source
Initialization of ports
Setting WDT
LVI reset
; The detection level is set with LVIS.
The low-voltage detector is operated (LVION = 1)
; f = High-speed internal oscillation clock (8.4 MHz (MAX.))/2
XP
Source: f
Timer starts (TMHE1 = 1)
Yes
No
; Clear low-voltage detection flag.
; Clear timer counter and timer starts.
Yes
; Setting the division ratio of the system clock,
timer, A/D converter, etc.
User's Manual U17446EJ3V1UD
Note
12
(2.1 MHz (MAX.))/2 ,
XP
51 ms when the compare value is 25
2
(default value)