NEC 78K0S/KB1+ User Manual page 108

Figure 6-25. Control Register Settings for Pulse Width Measurement by Means of Restart
7 6
CRC00 0 0
ES110 ES100 ES010
PRM00 0/1 0/1
7 6
TMC00 0 0
Note If the valid edge of the TI000 pin is specified to be both the rising and falling edges, 16-bit timer
capture/compare register 000 (CR000) cannot perform the capture operation.
Figure 6-26. Timing of Pulse Width Measurement Operation by Means of Restart
Count clock
TM00 count value
TI000 pin input
CR010 capture value
CR000 capture value
INTTM010
108
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
(with Rising Edge Specified)
(a) Capture/compare control register 00 (CRC00)
5 4 3 CRC002 CRC001
0 0 0 1 1
(b) Prescaler mode register 00 (PRM00)
ES000 3 2 PRM001
0 1 0 0 0/1
(c) 16-bit timer mode control register 00 (TMC00)
5 4 TMC003 TMC002 TMC001
0 0 1 0 0/1
(with Rising Edge Specified)
t
0000H 0001H
User's Manual U17446EJ3V1UD
CRC000
1
CR000 used as capture register
Captures to CR000 at inverse edge to valid edge of TI000
CR010 used as capture register
PRM000
0/1
Selects count clock (setting "11" is prohibited).
Specifies rising edge for pulse width detection.
Setting invalid (setting "10" is prohibited.)
OVF00
0
Clears and starts at valid edge of TI000 pin.
D0 0000H 0001H D1
D0
D1
(D1 + 1) × t
(D2 + 1) × t
Note
D2 0000H 0001H
D2
.