Mitsubishi Electric MELSEC-Q/L Programming Manual page 513

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Program example
• The following program sets "A/D conversion disabled" to the CH1 and CH2 of the Q68ADV at I/O numbers 040 to 04F when
X0 is turned on (writes "3" to the buffer memory address 0).
[Ladder Mode]
• The following program zeroes the positioning address/movement amount of axis 1 of the QD75P4 at I/O numbers 040 to
05F when X0 is turned on (writes 0 to the buffer memory addresses 2006 and 2007).
[Ladder Mode]
• The value of n1 is specified by the upper 3 digits of hexadecimal 4 digits which represent the head I/O
number of an intelligent function module.
[QCPU]
Power
supply
CPU
module
[LCPU]
CPU module
(L26CPU-BT)
Power
supply
CPU Built-in
module
Q68
QX10 QX10
QX10 QX10
ADV
0000
0010
0020
0030
0040
H
H
H
H
Built-in
LX40
LX40
LX40
I/0
CC-Link
C6
C6
C6
0000
0010
0030
0040
0050
H
H
H
H
[List Mode]
Step
Instruction
[List Mode]
Step
Instruction
QY41
QY10 QY10
P
0050
0070
0080
Head I/O number configured in
H
H
H
H
the I/O assignment setting
Specify K4 or H4 as the head I/O number to be written.
L60
LY41
LY10
LY10
LY10
AD4
NT1P
R2
R2
R2
0060
0070
0090
00A0
00B0
H
H
H
H
H
Specify K6 or H6 as the head I/O number to be written.
7.8 Buffer Memory Access Instructions
Device
Device
Head I/O number configured in
H
the I/O assignment setting
7 APPLICATION INSTRUCTIONS
7
511

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