Operation Processing Time Of Universal Model Qcpu - Mitsubishi Electric MELSEC-Q/L Programming Manual

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Operation processing time of Universal model QCPU

The processing time for the individual instructions are shown in the table on the following pages.

Operation processing times can vary substantially depending on the nature of the sources and destinations of the instructions,

and the values contained in the following tables should therefore be taken as a set of general guidelines to processing time

rather than as being strictly accurate.

Subset instruction processing time

The following describes the subset instruction processing time.

• The processing time shown in "Subset instruction processing time table" applies when the device used in an

instruction meets the device condition for subset processing. (For device condition triggering subset

processing, refer to Page 108 Subset processing.)

• When using the file resister (R, ZR), extended data register (D), extended link register (W), or module

access device (U3En\G10000 and later), add the processing time shown in Page 943 Table of the time to be

added when file register, extended data register, extended link register, and module access device are used

to that of each instruction.

• When using the F, T(ST), or C device with the OUT, SET, or RST instruction, add the processing time shown

in Page 946 Table of the time to be added when F/T(ST)/C device is used in OUT/SET/RST instruction to

that of each instruction.

• Since the processing time of an instruction varies depending on that of the cash function, both the minimum

and maximum values are described in the table.

■Subset instruction processing time table

• When using Q00UJCPU, Q00UCPU, Q01UCPU and Q02UCPU