Writing To Host Cpu Shared Memory - Mitsubishi Electric MELSEC-Q/L Programming Manual

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Writing to host CPU shared memory

TO(P), DTO(P)

• Q00CPU, Q01CPU: The serial number (first five digits) is "04122" or later.

Start I/O number of the host CPU module

 Basic model QCPU: 3E0H

 Universal model QCPU: 3E0H to 3E3H

CPU shared memory address of the write destination host CPU (BIN 16 bits)

 Basic model QCPU: 192 to 511

 Universal model QCPU: 2048 to 4095, 10000 to 24335

(S): Data to be written or head number of the devices where the data to be written is stored (BIN 16 bits)

Number of data blocks to be written (BIN 16 bits)

 Basic model QCPU: TO(P): 1 to 320, DTO(P): 1 to 160

 Universal model QCPU: TO(P): 1 to 14336, DTO(P): 1 to 7168

Internal device

*1 Specified with the upper three digits of the four hexadecimal digits representing the start I/O number.

*2 The setting range varies depending on the auto refresh setting range of the multiple CPU high speed transmission function.

The n1 is specified by the first 3 digits of the hexadecimal 4 digits which represent the head I/O number of the slot mounted to

the CPU module.

Processing details

• Writes device data of words (S) to n3 to the CPU shared memory address specified by n2 of the host CPU module or later

Device memory

(BIN 16 bits)

Head I/O number

CPU shared memory

of host CPU (n1)

indicates an instruction symbol of TO/DTO.

9 MULTIPLE CPU DEDICATED INSTRUCTIONS

9.1 Writing to the CPU Shared Memory of Host CPU