ZiLOG Z80 Handbook page 65

or CPD to determine whether the byte was found. Fig. 5-8 shows
the actions of CPI and CPD.
CPIR and CPDR are similar to CPI and CPD except that they
are fully automatic. If the byte count in BC is not equal to zero at
the end of execution of the instruction, and the current memory byte
does not equal the key value, the instruction is again executed for
another comparison. The instruction is continually executed until
either the byte count in BC is zero or until a memory location
matches the key, as shown in Fig. 5-9.
300511
3006H
3007H
300811
3009H
300AH
300B H
3000H
HL AT START (CPI )
HL AFTER CP I
if-
HL AFTER CPD
HL AT START (CPD)
CPI ACTIONS
1. READ NEXT BYTE
2. ADD 1 TO HL
3. SUBTRACT 1 FROM BC
4. COMPARE BYTE TO (A) AND SET FLAGS
5. GO ON TO NEXT INSTRUCTION
CPD ACTIONS
1. READ NEXT BYTE
2. SUBTRACT 1 FROM HL
3. SUBTRACT 1 FROM BC
4. COMPARE BYTE TO ( A) AND SET FLAGS
5. GOON TO NEXT INSTRUCTION
Fig. 5-8 . CPI and CPD instructions.
8-BIT ARITHMETIC AND LOGICAL GROUP
The 8-bit arithmetic and logical instructions are used to add, sub-
tract, AND, OR, exclusive OR, or compare two 8-bit operands, one
of which must be in the A register. The second operand may be an
immediate operand, may be in another CPU register, or may be in
memory and referenced by HL register indirect addressing or by
indexed addressing. The two operands are obtained, the designated
function is performed, and the result goes into the A register. The
condition codes are set as presented in Table 5-4.
There are two kinds of adds, ADD A,S and ADC A,S. In the first,
the contents of the A register and the second operand are simply
added and the results put into A; in the second, the contents of the
A register, the second operand, and the current state of the carry
flag are added and the results are put into the A register. The second
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