ZiLOG Z80 Handbook page 214

The IN instruction using the C register is different from the former
A register IN instruction in that input data does set the condition
codes in the C register I/O instruction case. The sign flag, zero flag,
and parity flags are all affected by the input data and can be tested
after execution of an IN R, (C) instruction, as was done in the previ-
ous example.
I/O BLOCK TRANSFER INSTRUCTIONS
The I/O block transfer instructions enable data to be input or out-
put in blocks of 1 to 256 bytes. The block access is either forward
through a block, or backwards through a block, as is the case in the
other Z-80 block instructions. Again, the transfers are either a byte
at a time per block instruction (semi-automatic) or the complete
block in one instruction (automatic).
The INI instruction transfers one byte of data from an I/O device
controller to memory. The C register is initialized with an I/O ad-
dress as in the case of an IN R, (C) instruction. As the INI is exe-
cuted, the input data is stored into the memory location pointed to
by the HL register. After the data is stored, the HL register pair is
incremented by one and a byte count in the BC register pair is dec-
remented by one. The Z flag is set if the contents of the BC register
pair equals zero after instruction execution. The following code
shows the setup of the registers for INI execution and the INI input
loop.
LD HL,BUFFER BUFFER ADDRESS
LD BC,25600+23H 100 BYTES & DEV ADD
STATUS IN D,(C) GET STATUS
BIT 0,D TEST
JP Z,STATUS LOOP IF NOT READY
INI INPUT ONE DATA BYTE
JP NZ,STATUS LOOP IF NOT 100 BYTES
DONE RET RETURN
The LD BC loads the B register with 10010 and the C register with
23H. The INI and JP instructions total 6.5 µs and as a result, the
maximum data transfer speed is 50% greater than the I/O loops
above. The INI replaces the following code in a conventional micro-
processor.
STATUS
e
I N A,(C) INPUT ONE BYTE
LD (HL),A STORE IN MEMORY
INC HL BUMP POINTER
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