ZiLOG Z80 Handbook page 145

HL,SAVL loads the address of SAVL ( 1000H ) while LD HL,
(SAVL) loads the contents of SAVL.
LD HL,SAVL
LOADS 1000H
LD
HL (SAVH)
LOADS 123AH
c
,
1000
SAVL DEFW 1234H
CONTENTS OF 1000H
IS 1234H
16-BIT DATA TRANSFERS TO THE STACK
The Z-80 allows the transfer of data from the HL, IX, and IY reg-
isters to the stack pointer register, but not the reverse. Examples of
these transfers are:
LD SP,HL HL TO SP
LD S^P,IX IX TO SP
LD SP,IY IY TO SP
16-BIT STACK OPERATIONS
The title of this subsection is a misnomer, for all stack operations
involve the transfer of sixteen bits or two bytes of data at a time.
Eight bits cannot be pushed or popped to the stack as in other micro-
computers. This is not a great disadvantage, although it may create
a little more overhead when only one register is to be saved in the
stack for temporary storage. In the Z-80 register pairs BC, DE, HL,
AF, and registers IX and IY may be pushed and popped to the
memory stack. As each is pushed to the stack, the data in the high-
order byte of the register pair is put into the top of stack -1 and
the data in the low-order byte is put into top of stack -2. The SP
register is decremented by one before each byte is pushed. The fol-
lowing explains stack action on a push of a register pair, IX or IY.
LD SP,1000H INITIALIZE SP TO 1000H
PUSH AF A TO OFFFH, F TO OFFEH
PUSH BC B TO OFFDH, C TO OFFCH
PUSH DE D TO OFFBH, E TO OFFAH
PUSH HL H TO OFF9H, L TO OFF8H
PUSH IX IX15-8 TO OFF7H, IX7-0 TO OFF6H
PUSH IY IY15-8 TO OFF5H, IY7-0 TO OFF4H
As the reader would suspect, the F (lags) register is treated as an
8-bit lower-order register on stack operations.
As data is popped from the stack, the process is reversed. The
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