ZiLOG Z80 Handbook page 51

SET B , ( IX + DI SET B OF LOCATION (IX + DI
BYTE 0
BYTE 1
BYTE 2
BYTE 3
1 1 0 1 1 1 0 1
1 1 0 0 1 0 1 1
D
1 1 B 1 1 0
} OP CODE
D VALUE
11211102 - OP CODE
B •BITCODE 0-7
Fig. 4- 19. Bit addressing / indexed addressing in SET B ,( IX+ D) instruction.
As the combinations of addressing modes employed in the various
instructions can be almost overwhelming on first encounter, Chart
4-1 provides a reference chart for instruction groups. The chart fol-
lows the same notation as has been used in the above description
BEFORE
REGISTER C
AFTER
t o 1 0 1 0 0 0 0
OOOOOOOo
1 1 0 1 1 1 1 1
1
0 0 0 1 0 0 1 0
01010001
t o 0 0 1 0 0 0 0
*
1 1 1 1 1 1 1 1
*
1 0 0 1 0 0 1 0
*
* - BIT SET
Fig. 4- 20. Bit addressing example.
INSTRUCTION
SET 0, C
SET 4, C
SET 5, C
SET 7, C
and that will be used in a discussion of the various instruction meth-
ods in the next chapter. Instructions and addressing modes used in
the 8080 are designated by a single line under the dot. Those used
in the 8008 and 8080 are designated by a double line under the dot.
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