ZiLOG Z80 Handbook page 168

ADD
A,30H
CONVERT TO.ASCII
CP
JP
ADD
A,3AH
M,OK2
A,7
GO IF NO CORRECTION
CORRECT FOR A - F
OK2 LD
(BUF+1),A STORE FOR OUTPUT
DONE
A left logical shift may also be implemented by addition. The A
register or HL register pair may be added to itself to shift data or
simply to multiply by powers of two. The ADD A, instruction is
one byte and takes 1 microsecond while a corresponding SLA is
two bytes and takes 2 microseconds. Needless to say the ADD A
should always be used. The 16-bit shifts of the HL register may be
implemented by the ADD HL,HL instruction. The code below
duplicates the multiply by ten above, but with 16 bits.
MUL10 LD HL,(NUMBER) GET MULTIPLICAND
ADD HL,HL 2 * MULTIPLICAND
PUSH HL
POP DE TRANSFER TO DE
ADD HL,HL 4 * MULTIPLICAND
ADD HL,HL 8 * MULTIPLICAND
ADD HL,DE 10 * MULTIPLICAND
ROTATE-TYPE SHIFTS
The Z-80 has eight rotate-type shifts, some of which are redundant.
The rotates basically shift the eight bits of the operand and a carry
or eight bits of the operand alone. In the first case, the shift is really
a 9-bit shift if the carry is considered an extension of the register or
memory location. Both the rotates with the carry and the rotates
without the carry have their uses. All rotates preserve all eight or
nine bits of the data and shift a CPU register or memory operand
A REGISTER ONLY
CPU REGISTER
OR MEMORY OPERAND
RLCA T O
RLC
G
RLA
RL
^Tf^i
Ir
RRCA RRC
CY
RRA
7 O RR
Y
Fig. 12-2. Shift actions.
177