ZiLOG Z80 Handbook page 156

utilizes a linear or in-line approach while the subtract example is an
iterative approach using a loop. In the add, a separate load, add, and
store is performed for each of the four bytes. All but the first add
adds in the carry from the lower-order byte by an ADC instruction.
The subtract example has some subtleties in it. The index registers
are initialized to the low-order address of the operands. A count of
four for the four subtracts is set up in the B register. For the first
add, the carry must be cleared and an XOR instruction is used to ac-
complish the clear. An XOR always clears the carry. Now the first
operands are subtracted and the result stored in the low-order byte
of the destination operand. The IX and IY registers are decremented
by one to point to OP1+2 and OP2+2. The count in the B register is
decremented and, because it is not yet zero, the jump is taken to
LOOP4. On the next subtract, the carry will be set, or reset, depen-
dent on the last SBC instruction since no other instruction in the
loop affects the carry. After four subtracts from low to high order,
the count in B is 0 and the instruction at DONE is executed and the
result is in OPl to OPl+3.
8-BIT LOGICAL OPERATIONS
The 8-bit logical operations are similar to the 8-bit adds in that
the same addressing modes are permitted and the A register con-
tains the primary operand and holds the result at the end of instruc-
tion execution. The three logical operations that can be performed
are the logical AND, OR, and exclusive on. The rules for these logi-
cal operations are shown in Table 11-1.
Table 11-1. Logical Operations
Instruction Logical Operation
Symbol
AND 0 0 1 1
A is the symbol for AND
A 0 A I A A
0 0 0 1
OR 0 0 1 1
V is the symbol for OR
V o V 1 V 0 V 1
o 1 1 1
XOR 0 0 1 1
® is the symbol for exclusive OR
0 ®1 ®0 ®1
0 1 1 0
Each logical operation is done for every bit position on a bit-by-bit
basis. One bit position does not affect any other bit position and
consequently there can be no carry.
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