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ZiLOG Z80 Handbook page 182

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SHIFT
RESIDUE
QUOTIENT
HL-BC f
I
H
B
16-BIT DIVIDEND
8-BIT DIVISOR
I
L
C
0
]----QUOTIENT B ITS
I
Fig. 12-11. A 16-bit by 8-bit divide register arrangement.
The register arrangement at the start of the divide is shown in
Fig. 12-11. The divisor is subtracted from the residue in HL after a
left shift of the residue (0 is in the msb of the dividend for the first
shift). The quotient bit is preset to a 1 in the lower end of the L
register. If the subtract will not "go," a restore is done (ADD
HL,BC) and the quotient bit reset to 0. At the end of the divide, the
residue or remainder is in H and an 8-bit quotient has been shifted
into L. Overflow is possible if the quotient cannot be resolved in
eight bits.
The preceding is a brief introduction to implementations of un-
signed "multiplies" and "divides." In many software projects such
simple operations will suffice; in other systems, more elaborate
arithmetic operations such as floating-point implementations will be
required.
191

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