ZiLOG Z80 Handbook page 109

CHAPTER 8
Interfacing Memory and
110 Devices to the Z-80
As the Z-80 requires only a single-phase clock and a single 5-volt
power supply, a minimum Z-80 system can be implemented with few
additional components. This chapter will describe simple interfac-
ing cases of the Z-80 and ROM memory, static RAM memory, dy-
namic RAM memory, and the Zilog Z-80 PIO.
MINIMUM Z-80 SYSTEM
The components required for a minimum Z-80 system are:
1. a 5-volt power supply
2. a single-phase TTL-compatible clock
3. a means to reset (restart) the system
4. ROM or PROM memory to contain the program
5. I/O interfacing and devices
6. the Z-80 CPU
Fig. 8-1 shows a minimum system with the above components. A
momentary switch resets the CPU and starts program execution at
location 0 by bringing down the RESET signal to a logic 0. As the
reader will recall from Chapter 3, the RESET signal disables inter-
rupts, sets the I and R registers equal to 0, sets interrupt mode 0,
and sets the program counter to 0. A simple timing circuit provides
a square-wave clock input at 2.5 to 4.0 MHz. The clock runs con-
tinuously. The ROM memory is a fast-access (greater than 250 nan-
oseconds) 512 x 8 ROM addressable by lines AO - A8 of the Z-80.
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