ZiLOG Z80 Handbook page 212

stored in the teletypewriter controller buffer (no earlier than 100 ms
for a typical teletypewriter).
As described in previous chapters, this routine is very much I/O
bound. Most of the execution time of the routine is spent in the
three-instruction loop waiting for the next data byte to appear and
set the ready status. The alternative method of interrupt transfers is
described later in this chapter. It is one way to overlap processing
and I/O. The maximum data transfer rate of the above loop can be
easily calculated. The four instructions require a total execution
time of 10.0 µs. If a high-speed I/O device was able to transfer one
byte every 10 µs, this timing loop would just be able to keep up
with it with perfectly synchronized timing. The absolute maximum
data transfer rate would thus be 100,000 bytes per second. High-
speed I/O devices rarely use a timing loop such as this; most devices
that are high-speed, relatively synchronous devices will use DMA,
or direct-memory-access. DMA allows the device controller to access
external memory independently of CPU processing, and enables
overlap of I/O transfers and CPU processing that is transparent to
the program being executed. DMA operations are described later in
this chapter.
The OUT (N),A instruction functions quite similarly to the IN
A, (N) instruction. The output process proceeds as follows: The
ready status of the device controller is first tested by reading in the
status. If the device controller is ready (done processing the previ-
ous character), the program performs an OUT (N ),A, outputting the
previously loaded A register to the data bus. The output sets the
"busy" status in the device controller. When the character has been
transmitted from the device controller buffer to the I/O device, the
busy status is reset. A typical output subroutine for one character
output would appear as shown next.
WRITEC EQU $
WRITE CHARACTER ROUTINE
LOOP IN
A,(1) GET STATUS
BIT 1,A
TEST READY STATUS
JP
OUT
NZ,LOOP
(0),A
GO IF NOT READY
OUTPUT BYTE
RET
RETURN
Here, the status is assumed to be compatible with the input routine,
bit 1 of the status indicating that the output section of the device
controller has finished writing the last byte. When the device con-
troller indicates "not busy" (bit 1 = 0), the contents of A are output
to the data channel of the device.
The above routines are designed to output, or input, one character
at a time in simplistic fashion, yet many devices, such as teletype-
writers, paper-tape readers and punches, line printers, certain crt
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