System Check And Check Synchronism - GE MiCOM P40 Agile Technical Manual

Single breaker current differential (with distance)
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Chapter 25 - Commissioning Instructions
17

SYSTEM CHECK AND CHECK SYNCHRONISM

This function performs a comparison between the line voltage and the bus voltage.
There are two voltage inputs to compare:
one from the voltage transformer input from the line side of the circuit breaker (Main VT)
one from the VT on the bus side of the circuit breaker (CS VT).
In most cases the line VT input is three phase, whereas the bus VTs are single phase.
The bus VT inputs are normally single phase so the system voltage checks are made on single phases and the VT
may be connected to either a phase-to-phase or phase to neutral voltage.
For these reasons, the IED has to be programmed with the appropriate connection. The CS Input setting in the CT
AND VT RATIOS column can be set to A-N, B-N, C-N, A-B, B-C or C-A according to the application.
The single-phase bus VT inputs each have associated phase shift and voltage magnitude compensation settings
to compensate for healthy voltage angle and magnitude differences between the check sync VT input and the
selected main VT reference phase. These are:
CS VT Ph Shift and CS VT Mag
Any voltage measurements or comparisons using bus VT inputs are made using the compensated values.
Each circuit breaker controlled can have two stages of check synchronism enabled according to the settings:
System Checks, CS1 Status and CS2 Status
When the system voltage check conditions are satisfied, the relevant DDB signals are asserted high as follows:
DDB (883): Check Sync 1 OK
DDB (884): Check Sync 2 OK
These DDB signals should be mapped to the monitor/download port and used to indicate that the system check
synchronism condition has been satisfied.
17.1
CHECK SYNCHRONISM PASS
1.
Taking note of the check synchronism settings, identify the appropriate VT input terminals and inject voltage
signals that should satisfy the system voltage check synchronism criteria.
2.
Check that the DDB signals are asserted high.
17.2
CHECK SYNCHRONISM FAIL
1.
Change the voltage signals so that the criteria are not satisfied
2.
Check that the appropriate DDB signals are driven low
684
P543i/P545i
P54x1i-TM-EN-1

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