GE MiCOM P40 Agile Technical Manual page 33

P543i/P545i
Figure 237: Underfrequency logic (single stage)
Figure 238: Overfrequency logic (single stage)
Figure 239: Rate of change of frequency logic (single stage)
Figure 240: Fault recorder stop conditions
Figure 241: Broken Current Accumulator logic diagram
Figure 242: CB Trip Counter logic diagram
Figure 243: Operating Time Accumulator
Figure 244: Excessive Fault Frequency logic diagram
Figure 245: Reset Lockout Alarm logic diagram
Figure 246: CB Condition Monitoring logic diagram
Figure 247: Reset Circuit Breaker Lockout Logic Diagram (Module 57)
Figure 248: CB State Monitor logic diagram (Module 1)
Figure 249: Hotkey menu navigation
Figure 250: Default function key PSL
Figure 251: Remote Control of Circuit Breaker
Figure 252: CB Control logic diagram (Module 43)
Figure 253: Pole Dead logic
Figure 254: Check Synchronisation vector diagram
Figure 255: Voltage Monitor for CB Closure (Module 59)
Figure 256: Check Synchronisation Monitor for CB closure (Module 60)
Figure 257: System Check PSL
Figure 258: Current Differential Starter Supervision Logic
Figure 259: Current Differential function Start logic
Figure 260: Switched Communication Path supervision
Figure 261: Communication Asymmetry Supervision
Figure 262: VTS logic
Figure 263: Differential CTS
Figure 264: Standard CTS
Figure 265: TCS Scheme 1
Figure 266: PSL for TCS Scheme 1
Figure 267: TCS Scheme 2
Figure 268: PSL for TCS Scheme 2
Figure 269: TCS Scheme 3
Figure 270: PSL for TCS Scheme 3
Figure 271: Scheme Logic Interfaces
Figure 272: Trip LED logic
Figure 273: Fibre Teleprotection connections for a three-terminal Scheme
Figure 274: Interfacing to PCM multiplexers
Figure 275: IM64 channel fail and scheme fail logic
Figure 276: IM64 general alarm signals logic
P54x1i-TM-EN-1
Table of Figures
413
414
415
432
437
437
438
438
439
440
441
444
446
447
448
449
450
453
454
455
456
464
465
466
467
474
476
477
479
480
481
481
482
482
487
491
503
508
511
511
xxxi