GE MiCOM P40 Agile Technical Manual page 32

Table of Figures
Figure 197: Autoreclose Shot Counters logic diagram (Module 41)
Figure 198: CB Control logic diagram (Module 43)
Figure 199: Circuit Breaker Trip Time Monitoring logic diagram (Module 53)
Figure 200: AR Lockout Logic Diagram (Module 55)
Figure 201: Reset Circuit Breaker Lockout Logic Diagram (Module 57)
Figure 202: Pole Discrepancy Logic Diagram (Module 62)
Figure 203: Circuit Breaker Trip Conversion Logic Diagram (Module 63)
Figure 204: Check Synchronisation Monitor for CB closure (Module 60)
Figure 205: Voltage Monitor for CB Closure (Module 59)
Figure 206: Three-phase Autoreclose System Check Logic Diagram (Module 45)
Figure 207: CB Manual Close System Check Logic Diagram (Module 51)
Figure 208: Circuit Breaker Fail logic - part 1
Figure 209: Circuit Breaker Fail logic - part 2
Figure 210: Circuit Breaker Fail logic - part 3
Figure 211: Circuit Breaker Fail logic - part 4
Figure 212: CB Fail timing
Figure 213: Phase Overcurrent Protection logic diagram
Figure 214: Negative Phase Sequence Overcurrent Protection logic diagram
Figure 215: IDG Characteristic
Figure 216: Earth Fault Protection logic diagram
Figure 217: EPATR B characteristic shown for TMS = 1.0
Figure 218: Sensitive Earth Fault Protection logic diagram
Figure 219: Current distribution in an insulated system with C phase fault
Figure 220: Phasor diagrams for insulated system with C phase fault
Figure 221: Positioning of core balance current transformers
Figure 222: High Impedance REF principle
Figure 223: High Impedance REF Connection
Figure 224: Thermal overload protection logic diagram
Figure 225: Spreadsheet calculation for dual time constant thermal characteristic
Figure 226: Dual time constant thermal characteristic
Figure 227: Broken conductor logic
Figure 228: Transient Earth Fault Logic Overview
Figure 229: Fault Type Detector Logic
Figure 230: Direction Detector Logic - Standard Mode
Figure 231: TEFD output alarm logic
Figure 232: Undervoltage - single and three phase tripping mode (single stage)
Figure 233: Overvoltage - single and three phase tripping mode (single stage)
Figure 234: Residual Overvoltage logic
Figure 235: Residual voltage for a solidly earthed system
Figure 236: Residual voltage for an impedance earthed system
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P543i/P545i
337
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339
340
341
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343
344
345
347
348
357
358
359
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362
368
370
373
375
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383
385
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389
393
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399
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408
P54x1i-TM-EN-1