NEC 78K0S/KA1+ User Manual page 251

8-bit single-chip microcontrollers
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(2) Low-voltage detection level select register (LVIS)
This register selects the low-voltage detection level.
This register can be set by an 8-bit memory manipulation instruction.
Reset input clears this register to 00H
Figure 16-3. Format of Low-Voltage Detection Level Select Register (LVIS)
Address: FF51H, After reset: 00H
Symbol
7
LVIS
0
LVIS3
0
0
0
0
0
0
0
0
1
1
Note For a reset by LVI, the value of LVIM is not initialized.
Caution
CHAPTER 16 LOW-VOLTAGE DETECTOR
Note
.
Note
R/W
6
5
0
0
LVIS2
LVIS1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
0
0
0
0
Other than above
Bits 4 to 7 must be set to 0.
User's Manual U16898EJ3V0UD
4
3
2
0
LVIS3
LVIS2
LVIS0
Detection level
0
V
(4.3 V ±0.2 V)
LVI0
1
V
(4.1 V ±0.2 V)
LVI1
0
V
(3.9 V ±0.2 V)
LVI2
1
V
(3.7 V ±0.2 V)
LVI3
0
V
(3.5 V ±0.2 V)
LVI4
1
V
(3.3 V ±0.15 V)
LVI5
0
V
(3.1 V ±0.15 V)
LVI6
1
V
(2.85 V ±0.15 V)
LVI7
0
V
(2.6 V ±0.1 V)
LVI8
1
V
(2.35 V ±0.1 V)
LVI9
Setting prohibited
1
0
LVIS1
LVIS0
251

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