NEC 78K0S/KA1+ User Manual page 77

Figure 5-10. Timing Chart of Default Start by Crystal/Ceramic Oscillator
V
DD
RESET
H
Internal reset
System clock
CPU clock
Notes 1. Operation stop time is 276
2. The clock oscillation stabilization time for default start is selected by the option byte. For details, refer
to CHAPTER 17 OPTION BYTE. The oscillation stabilization time that elapses after the STOP mode
is released is selected by the oscillation stabilization time select register (OSTS).
(a) The internal reset signal is generated by the power-on clear function on power application, the option byte is
referenced after reset, and the system clock is selected.
(b) After high-speed internal oscillation clock is generated, the option byte is referenced and the system clock is
selected. In this case, the crystal/ceramic oscillator clock is selected as the system clock.
(c) If the system clock is the crystal/ceramic oscillator clock, it starts operating as the CPU clock after clock
oscillation is stabilized. The wait time is selected by the option byte. For details, refer to CHAPTER 17
OPTION BYTE.
CHAPTER 5 CLOCK GENERATORS
(a)
Option byte is read.
System clock is selected.
Note 1
(Operation stops )
µ µ
s (MIN.), 544 s (TYP.), and 1.074 ms (MAX.).
User's Manual U16898EJ3V0UD
(b)
(c)
PCC = 02H, PPCC = 02H
Clock oscillation
stabilization
Note 2
time
Crystal/ceramic
oscillator clock
77